This project is funded by:
Efforts in electronic system sustainability have focused mostly on reusing and recycling. However, “repair” has not received as much attention, despite its potential to extend system lifespans significantly.
At Ulster University, researchers are developing bio-inspired solutions that make electronic systems more self-sufficient and resilient. Inspired by how biological systems handle failures, they are creating methods for these systems to “self-repair” and adapt to malfunctions, extending their operational life. This is a crucial step toward making electronics more sustainable by reducing the need for frequent replacements.For example, the most carbon intensive stage in a smartphone’s lifecycle is production and manufacturing (~80% of its total footprint). Giving an old phone a new life through refurbishment can therefore avoid significant emissions.
The Computational Neuroscience and Neuromorphic Engineering Team (CNET) works on two main research areas: brain-inspired hardware design and computer models of brain functions. This PhD project will focus on the first area, exploring innovative circuits for storing “synaptic weights” (a key part of how learning happens in biological and artificial neural networks). Using advanced storage methods, including photonic technology, these circuits could allow systems to be reconfigurable and energy-efficient, making them highly adaptable to real-world conditions.
The project aims to build new synaptic storage solutions that enhance neuromorphic (brain-like) computing hardware, which could make systems more capable of adapting to changes and enduring faults. Using technologies like FPGA (a type of reconfigurable hardware), the PhD research will test and refine neural network circuits with configurable weight storage to evaluate their performance under varied conditions.
Through this work, the PhD candidate will contribute to next-generation neuromorphic computing, helping pave the way for systems that are not only energy-efficient but also capable of continued operation despite faults, thus enhancing their sustainability.Fundamentally, the candidate will develop hardware design and testing skills.
Applicants should hold, or expect to obtain, a First or Upper Second Class Honours Degree in a subject relevant to the proposed area of study.
We may also consider applications from those who hold equivalent qualifications, for example, a Lower Second Class Honours Degree plus a Master’s Degree with Distinction.
In exceptional circumstances, the University may consider a portfolio of evidence from applicants who have appropriate professional experience which is equivalent to the learning outcomes of an Honours degree in lieu of academic qualifications.
If the University receives a large number of applicants for the project, the following desirable criteria may be applied to shortlist applicants for interview.
The University is an equal opportunities employer and welcomes applicants from all sections of the community, particularly from those with disabilities.
Appointment will be made on merit.
This project is funded by:
Department for the Economy (DFE) Scholarship – UK/ROI Awards
These scholarships will cover tuition fees and provide a maintenance allowance of £19,237 (tbc) per annum for three years (subject to satisfactory academic performance). A Research Training Support Grant (RTSG) of £900 per annum is also available.
To be eligible for these scholarships, applicants must meet the following criteria:
Applicants should also meet the residency criteria which requires that they have lived in the EEA, Switzerland, the UK or Gibraltar for at least the three years preceding the start date of the research degree programme.
Applicants who already hold a doctoral degree or who have been registered on a programme of research leading to the award of a doctoral degree on a full-time basis for more than one year (or part-time equivalent) are NOT eligible to apply for an award.
Due consideration should be given to financing your studies. Further information on cost of living
1] Javed A, Harkin J, McDaid L, Liu J (2021), "Spiking Neural Network-based Structural Health Monitoring Hardware System," IEEE Symposium Series on Computational Intelligence, pp. 1-7.
[2]. Liu et al. (2019) Exploring Self-Repair in a Coupled Spiking Astrocyte Neural Network. IEEE Transactions on Neural Networks and Learning Systems, 30(3), 865–875.
[3]. Johnson A. et al. (2018) Fault-Tolerant Learning in Spiking Astrocyte-Neural Networks on FPGAs. International Conference on VLSI Design and Embedded Systems (VLSID), 49-54.
[4] Shvan Karim et al. (2020) AstroByte: Multi-FPGA Architecture for Accelerated Simulations of Spiking Astrocyte Neural Networks, Design, Automation and Test in Europe (DATE).
[5] Li R, Gong Y, Huang H, et al. (2024) Photonics for Neuromorphic Computing: Fundamentals, Devices, and Opportunities. Advanced Materials. doi: 10.1002/adma.202312825.
Submission deadline
Thursday 9 January 2025
04:00PM
Interview Date
24 January 2025
Preferred student start date
31 March 2025
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